US 11,734,190 B2
Generating codewords with diverse physical addresses for 3DXP memory devices
Jian Huang, Union City, CA (US); and Zhenming Zhou, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 13, 2021, as Appl. No. 17/319,497.
Prior Publication US 2022/0365883 A1, Nov. 17, 2022
Int. Cl. G06F 11/30 (2006.01); G06F 12/1009 (2016.01); G06F 11/10 (2006.01); G06F 12/04 (2006.01)
CPC G06F 12/1009 (2013.01) [G06F 11/1068 (2013.01); G06F 12/04 (2013.01); G06F 2212/657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
selecting a first partition located on a first die of the memory device;
identifying a partition offset assigned to a second die of the memory device, wherein the partition offset reflects a physical layout of the memory device;
identifying a second partition located on the second die;
selecting, by adding the partition offset to a physical address of the second partition, a third partition located on the second die; and
generating a codeword comprising first data residing on the first partition and second data residing on the third partition.