CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01); G11C 16/26 (2013.01); G11C 16/0483 (2013.01)] | 20 Claims |
1. A system, comprising:
a memory device comprising a plurality of memory cells; and
a processing device coupled to the memory device, the processing device configured to:
iteratively update a read level according to a first step size;
detect a change in update pattern during the iterative update of the read level according to the first step size; and
iteratively update the read level according to a second step size based on the detected change.
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