US 11,733,913 B2
Balancing data for storage in a memory device
Christophe Vincent Antoine Laurent, Agrate Brianza (IT); Andrea Martinelli, Bergamo (IT); Marco Sforzin, Cernusco Sul Naviglio (IT); and Paolo Amato, Treviglio (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Feb. 22, 2022, as Appl. No. 17/677,586.
Application 17/677,586 is a continuation of application No. 16/865,163, filed on May 1, 2020, granted, now 11,262,937.
Prior Publication US 2022/0253237 A1, Aug. 11, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0602 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving, at a device that comprises a memory array, data that comprises a plurality of bits and is partitioned into a plurality of segments, wherein each bit of the plurality of bits is associated with a respective bit weight, and wherein a plurality of indices is assigned to the plurality of segments;
determining that the data has a first cumulative bit weight, the first cumulative bit weight being outside of a range that is based at least in part on a quantity of bits in the plurality of bits; and
inverting, based at least in part on the first cumulative bit weight being outside of the range, a first segment of the plurality of segments in accordance with the plurality of indices, wherein the data has a second cumulative bit weight after the first segment is inverted.