US 11,733,768 B2
Power control based on packet type
Steve F. Holmgren, Santa Barbara, CA (US); and John L. MacFarlane, Montecito, CA (US)
Assigned to Sonos, Inc., Santa Barbara, CA (US)
Filed by Sonos, Inc., Santa Barbara, CA (US)
Filed on Oct. 14, 2021, as Appl. No. 17/501,527.
Application 17/501,527 is a continuation of application No. 16/531,951, filed on Aug. 5, 2019, granted, now 11,157,069.
Application 16/531,951 is a continuation of application No. 15/245,591, filed on Aug. 24, 2016, granted, now 10,372,200, issued on Aug. 6, 2019.
Application 15/245,591 is a continuation of application No. 14/977,597, filed on Dec. 21, 2015, granted, now 10,303,240, issued on May 28, 2019.
Application 14/977,597 is a continuation of application No. 14/465,417, filed on Aug. 21, 2014, granted, now 9,252,721, issued on Jan. 13, 2016.
Application 14/465,417 is a continuation of application No. 13/212,889, filed on Aug. 18, 2011, granted, now 8,843,224, issued on Sep. 23, 2014.
Application 13/212,889 is a continuation of application No. 10/845,805, filed on May 15, 2004, granted, now 8,024,055, issued on Sep. 20, 2011.
Prior Publication US 2022/0035595 A1, Feb. 3, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/16 (2006.01); G06F 1/3296 (2019.01); H03F 99/00 (2009.01); H03F 1/52 (2006.01); H04R 27/00 (2006.01); H03F 3/183 (2006.01); H03G 1/00 (2006.01); H04L 69/22 (2022.01); G06F 1/3209 (2019.01); G06F 1/3246 (2019.01)
CPC G06F 1/3296 (2013.01) [G06F 1/3209 (2013.01); G06F 1/3246 (2013.01); G06F 3/162 (2013.01); G06F 3/165 (2013.01); H03F 1/52 (2013.01); H03F 3/183 (2013.01); H03F 99/00 (2022.08); H03G 1/0088 (2013.01); H04L 69/22 (2013.01); H04R 27/00 (2013.01); H03F 2200/03 (2013.01); H04R 2227/003 (2013.01); H04R 2227/005 (2013.01); H04R 2420/01 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A first playback device comprising:
one or more processors;
at least one tangible, non-transitory computer readable memory; and
program instructions stored on the at least one tangible, non-transitory computer-readable memory, wherein the program instructions, when executed by the one or more processors, configure the first playback device to:
after the first playback device has determined that a defined time has passed since receiving a packet addressed to the first playback device and comprising audio data, transition the first playback device from (i) operating in a first power mode where the first playback device consumes a first amount of power to (ii) operating in a second power mode where the first playback device consumes a second amount of power that is less than the first amount of power; and
after receiving a packet relating to an audio source and addressed to the first playback device while operating in the second power mode, transition the first playback device from (i) operating in the second power mode to (ii) operating in the first power mode.