US 12,396,260 B2
Metal-oxide-semiconductor field effect transistors including a plurality of nanosheets
Seokhyeon Yoon, Seoul (KR); Junyoung Park, Hwaseong-si (KR); Woocheol Shin, Seoul (KR); and Seunghun Lee, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 25, 2024, as Appl. No. 18/645,551.
Application 18/645,551 is a continuation of application No. 17/410,325, filed on Aug. 24, 2021, granted, now 11,973,082.
Claims priority of application No. 10-2020-0183521 (KR), filed on Dec. 24, 2020.
Prior Publication US 2024/0282773 A1, Aug. 22, 2024
Int. Cl. H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/786 (2006.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 86/00 (2025.01)
CPC H10D 86/201 (2025.01) [H10D 30/6757 (2025.01); H10D 62/116 (2025.01); H10D 62/118 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing an integrated circuit device, the method comprising:
preparing a semiconductor on insulator (SOI) substrate layer having a first region and a second region, the SOI substrate including a base substrate layer, an insulating substrate layer on the base substrate layer, and a cover substrate layer on the insulating substrate layer;
forming a substrate recess by removing the cover substrate layer and the insulating substrate layer in the second region;
forming an epi-substrate layer within the substrate recess in the second region, the epi-substrate layer and a portion of the base substrate layer in the second region constituting a semiconductor substrate layer;
forming a stacked structure of a plurality of sacrificial semiconductor layers and a plurality of nanosheet semiconductor layers on the SOI substrate layer and the semiconductor substrate layer, the plurality of sacrificial semiconductor layers and the plurality of nanosheet semiconductor layers being alternately stacked on the SOI substrate layer and the semiconductor substrate layer;
forming a plurality of first fin-type active areas in the first region, a plurality of second fin-type active areas in the second region, and a plurality of nanosheet stacked structures above the plurality of first fin-type active areas and the plurality of second fin-type active areas, by etching the stacked structure of the plurality of sacrificial semiconductor layers and the plurality of nanosheet semiconductor layers, portions of the SOI substrate layer, and portions of the semiconductor substrate layer, wherein each of the plurality of nanosheet stacked structures comprising a plurality of nanosheets;
forming a plurality of first source/drain regions between adjacent nanosheet stacked structures in the first region; and
forming a plurality of second source/drain regions between adjacent nanosheet stacked structures in the second region.