| CPC H10D 84/834 (2025.01) [H10D 64/017 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |
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1. A method for forming a semiconductor structure, comprising:
receiving a substrate having a first region and a second region;
forming a first isolation structure in the first region;
forming a first gate dielectric layer in the first region;
forming a plurality of fin structures in the second region after the forming of the first gate dielectric layer;
forming a plurality of second isolation structures separating the fin structures in the second region; and
forming a first gate structure over the first gate dielectric layer in the first region and a second gate structure over the fin structures in the second region,
wherein the forming of the first isolation structure and the first gate dielectric layer further comprises:
forming a patterned mask layer over the substrate;
forming a first recess in the first region;
filling the first recess with a first insulating layer;
forming a second recess exposing a portion of the first insulating layer and a portion of the substrate; and
forming the first gate dielectric layer in the second recess.
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