US 12,396,238 B2
Insulated gate bipolar transistor device
Wei Liu, Jiangsu (CN); Minzhi Lin, Jiangsu (CN); Yuanlin Yuan, Jiangsu (CN); and Rui Wang, Jiangsu (CN)
Assigned to SUZHOU ORIENTAL SEMICONDUCTOR CO., LTD., Jiangsu (CN)
Appl. No. 18/017,047
Filed by SUZHOU ORIENTAL SEMICONDUCTOR CO., LTD., Jiangsu (CN)
PCT Filed Jun. 27, 2022, PCT No. PCT/CN2022/101534
§ 371(c)(1), (2) Date Jan. 19, 2023,
PCT Pub. No. WO2023/109080, PCT Pub. Date Jun. 22, 2023.
Claims priority of application No. 202111561080.4 (CN), filed on Dec. 15, 2021.
Prior Publication US 2024/0250137 A1, Jul. 25, 2024
Int. Cl. H10D 12/00 (2025.01); H10D 64/27 (2025.01)
CPC H10D 64/281 (2025.01) [H10D 12/481 (2025.01)] 6 Claims
OG exemplary drawing
 
1. An insulated gate bipolar transistor (IGBT) device, comprising:
a p-type collector region;
an n-type semiconductor layer located above the p-type collector region;
a plurality of gate trenches, shielded gates, and gates, wherein the plurality of gate trenches are located in the n-type semiconductor layer; each of the shielded gates is located in a lower part of one of the plurality of gate trenches; each of the gates is located in an upper part of one of the plurality of the gate trenches; and each of the gates, each of the shielded gates, and the n-type semiconductor layer are insulated and isolated from each other, wherein
each of partial shielded gates among the shielded gates located in the plurality of gate trenches is externally connected to a gate voltage, the partial shielded gates are each defined as a first shielded gate, each of shielded gates other than the partial shielded gates and among the shielded gates located in the plurality of gate trenches is externally connected to an emitter electrode voltage, the shielded gates other than the partial shielded gates are each defined as a second shielded gate, and the first shielded gate and the second shielded gate are disposed alternately; and
a p-type body region located in the n-type semiconductor layer and between adjacent gate trenches among the plurality of gate trenches, wherein the p-type body region comprises a first p-type body region and a second p-type body region, the first p-type body region is located on a side of the p-type body region close to a first shielded gate adjacent to the p-type body region, the second p-type body region is located on a side of the p-type body region close to a second shielded gate adjacent to the p-type body region, an n-type emitter electrode region is disposed in each of the first p-type body region and the second p-type body region, and a doping concentration of the first p-type body region is smaller than a doping concentration of the second p-type body region.