| CPC H10D 64/017 (2025.01) [H10D 30/031 (2025.01); H10D 30/6715 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/021 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0147 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |

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1. A method, comprising:
forming a dielectric layer over a substrate;
forming a carbon nanotube (CNT) over the dielectric layer;
forming a dummy gate structure over the CNT;
forming gate spacers on opposite sidewalls of the dummy gate structure;
after forming the gate spacers, etching the CNT and the dielectric layer to shorten the CNT and the dielectric layer;
after etching the CNT and the dielectric layer, forming source/drain epitaxy structures on opposite sides of the dummy gate structure and in contact with opposite sidewalls of the CNT;
replacing the dummy gate structure with a metal gate structure; and
forming source/drain contacts over the source/drain epitaxy structures, respectively.
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