US 12,396,227 B2
Full wrap around backside contact
Ruilong Xie, Niskayuna, NY (US); Kisik Choi, Watervliet, NY (US); Junli Wang, Slingerlands, NY (US); Julien Frougier, Albany, NY (US); and Min Gyu Sung, Latham, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Aug. 31, 2022, as Appl. No. 17/899,948.
Prior Publication US 2024/0072116 A1, Feb. 29, 2024
Int. Cl. H10D 62/13 (2025.01); B82Y 10/00 (2011.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 64/23 (2025.01)
CPC H10D 62/151 (2025.01) [H01L 23/481 (2013.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10D 62/116 (2025.01); H10D 62/121 (2025.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a first source/drain (S/D) epi region having a first contact completely wrapping around the first S/D epi region, the first contact electrically connected to a backside power delivery network (BSPDN); and
a second S/D epi region having a second contact directly contacting a first sidewall, a second sidewall, and a top surface of the second S/D epi region and being horizontally aligned with the first S/D epi region, the second contact electrically connected to back-end-of-line (BEOL) components.