US 12,396,203 B2
Semiconductor structure having a source/drain epitaxial stack with a non-crystalline layer therein
Wen-Hsien Tu, Hsinchu (TW); and Wei-Fan Lee, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed on Jul. 29, 2022, as Appl. No. 17/876,638.
Application 17/876,638 is a division of application No. 16/901,603, filed on Jun. 15, 2020, granted, now 11,600,728.
Prior Publication US 2022/0376067 A1, Nov. 24, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 29/04 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01); H10D 62/00 (2025.01); H10D 62/13 (2025.01); H10D 62/40 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 30/62 (2025.01) [H01L 21/02609 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 30/6219 (2025.01); H10D 30/797 (2025.01); H10D 62/021 (2025.01); H10D 62/151 (2025.01); H10D 62/405 (2025.01); H10D 64/021 (2025.01); H10D 84/013 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
a fin comprising first and second fin portions disposed on the substrate, wherein the first fin portion is shorter than the second fin portion;
a dielectric layer disposed adjacent to the fin, wherein the dielectric layer surrounds a bottom portion of the second fin portion and sidewalls of the first fin portion, and wherein the dielectric layer is taller than the first fin portion;
a gate stack disposed on the second fin portion uncovered by the dielectric layer; and
an epitaxial stack disposed on the first fin portion, wherein the epitaxial stack abuts the gate stack and comprises:
a first crystalline epitaxial layer comprising facets disposed on the first fin portion;
a non-crystalline layer disposed on the first crystalline layer; and
a second crystalline epitaxial layer disposed on the non-crystalline layer, wherein the second crystalline epitaxial layer is substantially facet-free.
 
10. A semiconductor structure, comprising:
a fin structure on a substrate and comprising a first portion and a second portion on the first portion;
a dielectric layer on sidewall surfaces of the fin structure, wherein the first portion of the fin structure is recessed in the dielectric layer;
a first crystalline epitaxial layer on the second portion of the fin structure;
a non-crystalline epitaxial layer on the first crystalline layer; and
a second crystalline epitaxial layer on the non-crystalline epitaxial layer.
 
16. A semiconductor structure, comprising:
a fin structure on a substrate;
a gate structure over a channel region of the fin structure;
a source/drain (S/D) structure on the fin structure and adjacent to the gate structure, comprising:
a first portion on a top surface of the fin structure, wherein the first portion is crystalline and confined by a spacer structure;
a second portion on the first portion, wherein the second portion is crystalline and has a diamond shape;
a non-crystalline epitaxial layer over the second portion; and
a third portion on the non-crystalline epitaxial layer, wherein an area of a top surface of the third portion is greater than an area of a top surface of the second portion.