US 12,396,200 B2
Enhancement-type semiconductor structure and manufacturing method thereof
Kai Cheng, Jiangsu (CN)
Assigned to ENKRIS SEMICONDUCTOR, INC., Jiangsu (CN)
Filed by ENKRIS SEMICONDUCTOR, INC., Jiangsu (CN)
Filed on Oct. 21, 2022, as Appl. No. 17/970,959.
Claims priority of application No. 202111275591.X (CN), filed on Oct. 29, 2021.
Prior Publication US 2023/0133164 A1, May 4, 2023
Int. Cl. H01L 29/778 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01)
CPC H10D 30/475 (2025.01) [H10D 30/015 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01)] 17 Claims
OG exemplary drawing
 
1. An enhancement-type semiconductor structure, comprising:
a semiconductor substrate; and
a heterojunction structure on the semiconductor substrate, wherein the heterojunction structure comprises a channel layer close to the semiconductor substrate and a first potential barrier layer far away from the semiconductor substrate; the heterojunction structure comprises a gate region, and a source region and a drain region located on two sides of the gate region respectively; the heterojunction structure further comprises an intermediate layer sandwiched between the channel layer in the gate region and the first potential barrier layer in the gate region; and the intermediate layer is to depolarize the first potential barrier layer in the gate region;
wherein the intermediate layer is an amorphous layer or a polycrystalline layer;
when the intermediate layer is the amorphous layer, a material of the amorphous layer comprises at least one of silicon nitride, silicon dioxide, silicon oxynitride, and hafnium oxide, aluminum oxide, or aluminum oxynitride; and
when the intermediate layer is the polycrystalline layer, the material of the polycrystalline layer comprises at least one of polycrystalline diamond, polycrystalline nickel oxide, or polycrystalline gallium nitride.