| CPC H10D 12/481 (2025.01) [H10D 8/00 (2025.01); H10D 12/01 (2025.01); H10D 64/513 (2025.01)] | 18 Claims |
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1. A semiconductor device comprising:
a semiconductor substrate;
a plurality of trenches provided on a top surface side of the semiconductor substrate;
an insulated gate electrode structure buried inside the respective trenches;
an interlayer insulating film deposited on top surfaces of the semiconductor substrate and the insulated gate electrode structure; and
a silicide layer deposited at a bottom of a contact hole penetrating the interlayer insulating film so as to be in contact with the top surface of the semiconductor substrate interposed between the trenches adjacent to each other,
wherein at least a part of a bottom surface of the silicide layer is located at a higher position than a bottom surface of the interlayer insulating film.
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