US 12,396,179 B2
Resistive random access memory device
Jheng-Hong Jiang, Hsinchu (TW); Cheung Cheng, Hsinchu (TW); and Chia-Wei Liu, Zhubei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Mar. 25, 2024, as Appl. No. 18/615,936.
Application 18/615,936 is a continuation of application No. 17/884,014, filed on Aug. 9, 2022, granted, now 11,950,433.
Application 17/884,014 is a continuation of application No. 17/242,068, filed on Apr. 27, 2021, granted, now 11,489,011.
Application 17/242,068 is a continuation of application No. 16/419,324, filed on May 22, 2019, granted, now 11,011,576.
Claims priority of provisional application 62/691,292, filed on Jun. 28, 2018.
Prior Publication US 2024/0237357 A1, Jul. 11, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 63/00 (2023.01); G11C 13/00 (2006.01); H10N 70/00 (2023.01)
CPC H10B 63/20 (2023.02) [G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); H10B 63/84 (2023.02); H10N 70/021 (2023.02); H10N 70/023 (2023.02); H10N 70/063 (2023.02); H10N 70/066 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 70/881 (2023.02); H10N 70/8833 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first conductor extending substantially along a first axis;
a first selector material comprising a first portion that extends parallel to a first sidewall of the first conductor and a second portion that extends parallel to a second sidewall of the first conductor; and
a second selector material comprising a third portion that extends along the first sidewall of the first conductor and a fourth portion that extends along the second sidewall of the first conductor, wherein the first and second sidewalls are at least partially embedded in the third and fourth portions, respectively.