| CPC H10B 12/50 (2023.02) [G11C 11/4085 (2013.01); G11C 11/4091 (2013.01)] | 25 Claims |

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1. A microelectronic device, comprising:
a control logic structure including sense amplifiers clustered around sense amplifier exit regions;
an upper memory array structure underlying the control logic structure and comprising memory cells coupled to some of the sense amplifiers of the control logic structure by way of routing extending through the sense amplifier exit regions; and
a lower memory array structure underlying the upper memory array structure and comprising additional memory cells coupled to some other of the sense amplifiers of the control logic structure by way of additional routing extending through the sense amplifier exit regions.
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