US 12,396,159 B2
Semiconductor device and methods of manufacturing the same
Junhyeok Ahn, Suwon-si (KR); Sohyun Park, Seoul (KR); and Hyosub Kim, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-Do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 20, 2022, as Appl. No. 17/969,966.
Claims priority of application No. 10-2021-0146063 (KR), filed on Oct. 28, 2021.
Prior Publication US 2023/0137846 A1, May 4, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/315 (2023.02) [H10B 12/50 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate comprising a cell array area, a peripheral circuit area, a plurality of first active areas defined in the cell array area, and at least one second active area defined in the peripheral circuit area;
a plurality of bit lines in the cell array area of the substrate and extending in a first direction;
a plurality of cell pad structures between the plurality of bit lines and each comprising a first conductive layer, a first intermediate layer, and a first metal layer that are sequentially arranged on a top surface of a respective one of the plurality of first active areas; and
a peripheral circuit gate electrode on the peripheral circuit area of the substrate and comprising a second conductive layer, a second intermediate layer, and a second metal layer that are sequentially arranged on the at least one second active area.