US 12,396,152 B2
Semiconductor structure and method for forming the same
Yi-Wang Jhan, Quanzhou (CN); Fu-Che Lee, Quanzhou (CN); Gang-Yi Lin, Quanzhou (CN); An-Chi Liu, Quanzhou (CN); Yifei Yan, Quanzhou (CN); and Yu-Cheng Tung, Quanzhou (CN)
Assigned to Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed by Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed on Dec. 27, 2023, as Appl. No. 18/396,747.
Application 18/396,747 is a continuation of application No. 17/378,787, filed on Jul. 19, 2021, granted, now 11,903,181.
Claims priority of application No. 202110697716.1 (CN), filed on Jun. 23, 2021; and application No. 202121406701.7 (CN), filed on Jun. 23, 2021.
Prior Publication US 2024/0130104 A1, Apr. 18, 2024
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/09 (2023.02) [H10B 12/0335 (2023.02); H10B 12/315 (2023.02); H10B 12/34 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
a first dielectric layer disposed on the substrate;
a second dielectric layer disposed on the first dielectric layer, wherein a bottommost surface of the second dielectric layer is in physical contact with a topmost surface of the first dielectric layer;
an opening on a peripheral region of the substrate and having a lower portion through the first dielectric layer and an upper portion through the second dielectric layer;
an conductive layer disposed on the second dielectric layer at two sides of the opening, wherein a bottommost surface of the conductive layer is in physical contact with a topmost surface of the second dielectric layer;
a contact structure disposed in the lower portion of the opening; and
a passivation layer covering a top surface of the contact structure, a sidewall of the second dielectric layer, and a sidewall of the conductive layer.