US 12,396,096 B2
Circuit board device
Chin-Hsun Wang, Taipei (TW); Ruey-Beei Wu, Taipei (TW); Chun-Jui Huang, Taoyuan (TW); Wei-Yu Liao, Taoyuan (TW); Ching-Sheng Chen, Taoyuan (TW); and Chi-Min Chang, Taoyuan (TW)
Assigned to NATIONAL TAIWAN UNIVERSITY, Taipei (TW)
Filed by UNIMICRON TECHNOLOGY CORP., Taoyuan (TW); and National Taiwan University, Taipei (TW)
Filed on Jun. 30, 2023, as Appl. No. 18/345,440.
Claims priority of application No. 112119769 (TW), filed on May 26, 2023.
Prior Publication US 2024/0397621 A1, Nov. 28, 2024
Int. Cl. H05K 1/11 (2006.01); H05K 1/02 (2006.01)
CPC H05K 1/115 (2013.01) [H05K 1/0298 (2013.01); H05K 1/116 (2013.01); H05K 1/0251 (2013.01); H05K 2201/093 (2013.01); H05K 2201/0939 (2013.01); H05K 2201/096 (2013.01); H05K 2201/09827 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit board device, comprising:
a transition region, comprising:
a first conductive layer at a first level, comprising:
a pad used to connect to a solderless connector;
a transmission line connected to the pad, wherein the transmission line comprises a first segment connected to the pad and a second segment connected to the first segment, wherein the first segment has a first width, the second segment has a second width, and the second width is less than or equal to the first width; and
a first reference layer, wherein the first reference layer has a first anti-pad region for the pad and the transmission line disposed therein;
a second conductive layer at a second level, comprising:
a second reference layer, wherein the second reference layer has a second anti-pad region, wherein in a plan view, a portion of the first anti-pad region surrounding the pad is completely within the second anti-pad region, wherein a geometric center point of the second anti-pad region below the first anti-pad region is offset from a geometric center point of the pad in the plan view, and wherein a first dimension of the second anti-pad region in a first direction is smaller than a second dimension of the second anti-pad region in a second direction; and
conductive vias vertically disposed between the first conductive layer and the second conductive layer, wherein the conductive vias are connected to the first reference layer and the second reference layer and surround the pad.