| CPC H04N 19/70 (2014.11) [H04N 19/136 (2014.11); H04N 19/169 (2014.11); H04N 19/174 (2014.11); H04N 23/698 (2023.01)] | 20 Claims |

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1. A video decoding device, comprising:
a processor configured to:
obtain a video bitstream associated with a picture, wherein the picture is partitioned into multiple sub-pictures and wherein the video bitstream indicates whether respective sub-picture identifiers (IDs) of the multiple sub-pictures are signaled in the video bitstream, the video bitstream further indicating whether at least one sub-picture of the multiple sub-pictures is treated as a picture and whether wrap-around motion compensation is enabled for the at least one sub-picture;
determine the respective sub-picture IDs of the multiple sub-pictures from the video bitstream in response to determining, based on the video bitstream, that the respective sub-picture IDs are signaled in the video bitstream; and
in response to determining, based on the video bitstream, that the at least one sub-picture is treated as a picture and that wrap-around motion compensation is enabled for the at least one sub-picture:
determine a wrap-around offset applicable to the at least one sub-picture;
decode the picture associated with the bitstream based at least on the respective sub-picture IDs of the multiple sub-pictures and the determined wrap-around offset.
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