US 12,395,163 B2
Method and system for injection locked divider with frequency calibration
Delong Cui, Irvine, CA (US); Guansheng Li, Irvine, CA (US); Jun Cao, Irvine, CA (US); Yonghyun Shim, Irvine, CA (US); and Yu-Ming Ying, Irvine, CA (US)
Assigned to Avago Technologies International Sales Pte. Limited, Shenzhen (CN)
Filed by Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed on Oct. 31, 2023, as Appl. No. 18/499,186.
Prior Publication US 2025/0141435 A1, May 1, 2025
Int. Cl. H03K 5/00 (2006.01); H03K 19/20 (2006.01)
CPC H03K 5/00006 (2013.01) [H03K 19/20 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A circuitry comprising:
a series of symmetrical stages with an initial stage in the series coupled to an input signal comprising a first plurality of phases and an output stage in the series coupling an output signal comprising a second plurality of phases to a calibration engine, wherein a quantity of the phases in the output signal comprising the second plurality of phases is increased based at least on a quantity of the symmetrical stages and a quantity of the first plurality of the phases in the input signal;
wherein the calibration engine calibrates a frequency of the circuitry within a range based at least on a target frequency;
wherein the calibration engine outputs a current provided to the series, the output current based at least on a calibrated frequency;
wherein each stage of the series of the symmetrical stages comprises a pair of first inverters coupled in series to a pair of cross-coupled inverters; and
wherein a capacitor coupled in parallel to the cross-coupled inverters, the capacitor to tune a frequency of each stage of the series of symmetrical stages.