| CPC H03K 3/0372 (2013.01) [H03K 3/0375 (2013.01); H03K 3/35625 (2013.01)] | 20 Claims |

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18. A semiconductor device, comprising
a scannable D flip-flop, comprising: a master latch and a slave latch; and
a balloon latch, coupled between an input terminal and an output terminal of the slave latch through an inverter, wherein the balloon latch comprises a data path and a feedback path,
wherein a first leakage-free dummy cell and a second leakage-free dummy cell are disposed in the data path and the feedback path, respectively.
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