US 12,395,156 B1
Terminal correction circuit
Chen-Yu Wu, Hsinchu (TW); and Tzu-Chao Wu, Hsinchu (TW)
Assigned to Winbond Electronics Corp., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Mar. 7, 2024, as Appl. No. 18/597,938.
Claims priority of application No. 113103964 (TW), filed on Feb. 1, 2024.
Int. Cl. H03K 3/0233 (2006.01); H03K 3/011 (2006.01); H03K 5/24 (2006.01)
CPC H03K 3/0233 (2013.01) [H03K 3/011 (2013.01); H03K 5/2481 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A terminal correction circuit, comprising:
a first terminal replica model having a first adjustable resistor and a second adjustable resistor, wherein the first adjustable resistor is coupled between a second power supply voltage and a first node, and the second adjustable resistor is coupled between the first node and a ground voltage, the first terminal replica model is configured to set a resistance ratio of the first adjustable resistor and the second adjustable resistor according to a voltage correction code, thereby adjusting a terminal voltage generated by the first node;
a terminal voltage offset correction circuit coupled to the first terminal replica model to compare the terminal voltage with a third power supply voltage and provide the voltage correction code according to a comparison result;
a second terminal replica model coupled to the terminal voltage offset correction circuit and having a third adjustable resistor and a fourth adjustable resistor, wherein the third adjustable resistor is coupled between a half-voltage terminal and a second node, and the fourth adjustable resistor is coupled between the second node and the ground voltage, the second terminal replica model is configured to set a resistance ratio of the third adjustable resistor and the fourth adjustable resistor according to the voltage correction code, and to reduce an equivalent resistance value between the half-voltage terminal and the ground voltage according to a resistance correction code; and
a terminal resistance offset correction circuit coupled to the second terminal replica model for comparing a comparison voltage generated at the half-voltage terminal with the second power supply voltage, and providing the resistance correction code according to a comparison result.