US 12,395,138 B2
Current steering biasing for power control in cascode-based power amplifier stage of radar applications for improved reliability
Achal Venkatesh, Bangalore (IN); Gilles Montoriol, Fontenilles (FR); and Birama Goumballa, Larra (FR)
Assigned to NXP B.V., Eindhoven (NL)
Filed by NXP B.V., Eindhoven (NL)
Filed on Jul. 13, 2022, as Appl. No. 17/812,292.
Claims priority of application No. 202221030004 (IN), filed on May 25, 2022.
Prior Publication US 2023/0412131 A1, Dec. 21, 2023
Int. Cl. H03F 3/24 (2006.01); G01S 7/02 (2006.01); H03F 3/195 (2006.01); H03F 3/45 (2006.01); H03F 3/72 (2006.01)
CPC H03F 3/245 (2013.01) [G01S 7/02 (2013.01); H03F 3/195 (2013.01); H03F 3/45201 (2013.01); H03F 3/72 (2013.01); H03F 2200/451 (2013.01); H03F 2203/7239 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A power amplifier stage, comprising:
a plurality of amplifier branch circuits, each amplifier branch circuit comprising:
a first cascode device having current terminals coupled between an output node and an intermediate node, and having a control terminal receiving a corresponding one of a plurality of first activation signals;
a source cascode device having current terminals coupled between a supply reference node and the intermediate node, and having a control terminal receiving an input signal; and
a replica cascode device having current terminals coupled between a power supply node and the intermediate node, and having a control terminal receiving a corresponding one of a plurality of complementary activation signals; and
wherein an output power level of the power amplifier stage is controlled by asserting a selected number of the plurality of first activation signals and corresponding ones of the plurality of complementary activation signals for activating a selected number of the plurality of amplifier branch circuits;
wherein deactivation of the replica cascode device and activation of the first cascode device provides a power gain to the input signal at the output node; and
wherein activation of the replica cascode device and deactivation of the first cascode device results in no power gain at the output node with respect to the input signal.