US 12,395,087 B1
Power distribution architecture with series-connected bus converter
Patrizio Vinciarelli, Boston, MA (US); and Andrew D'Amico, Marina Del Rey, CA (US)
Assigned to Vicor Corporation, Andover, MA (US)
Filed by Vicor Corporation, Andover, MA (US)
Filed on May 25, 2023, as Appl. No. 18/323,974.
Application 18/323,974 is a continuation of application No. 17/385,384, filed on Jul. 26, 2021, granted, now 11,705,820.
Application 17/385,384 is a continuation of application No. 16/781,070, filed on Feb. 4, 2020, granted, now 11,075,583, issued on Jul. 27, 2021.
Application 16/781,070 is a continuation of application No. 16/022,636, filed on Jun. 28, 2018, granted, now 10,594,223, issued on Mar. 17, 2020.
Application 16/022,636 is a continuation of application No. 13/933,252, filed on Jul. 2, 2013, granted, now 10,199,950, issued on Feb. 5, 2019.
Int. Cl. H02M 3/335 (2006.01); H02M 3/158 (2006.01); H02M 1/00 (2006.01)
CPC H02M 3/33576 (2013.01) [H02M 3/158 (2013.01); H02M 3/33561 (2013.01); H02M 1/0058 (2021.05); H02M 1/0064 (2021.05); H02M 1/0093 (2021.05)] 95 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a bus converter circuit having a first terminal, a second terminal, and a common terminal and being configured to convert power in a direction, the direction being one of the following:
(a) a first direction in which the first terminal and common terminal form an input for receiving input power at a first voltage, V1, and the second terminal and the common terminal form an output for delivering output power at a second voltage, V2, or
(b) a second direction in which the second terminal and the common terminal form an input for receiving input power at the second voltage, V2, and the first terminal and the common terminal form an output for delivering output power at the first voltage, V1;
wherein the input and output are galvanically connected;
wherein over a range of input voltages the bus converter circuit uses an essentially fixed voltage transformation ratio, K, equal to the second voltage, V2 divided by the first voltage, V1, (K=V2/V1), to convert power in the direction, such that output power delivered in the first direction is at the second voltage, V2=K×V1, and output power delivered in the second direction is at the first voltage, V1=V2/K;
wherein the first voltage, V1, is greater than the second voltage, V2;
wherein the bus converter circuit includes (i) a transformer having a first winding and a second winding, (ii) a plurality of switches, and (iii) a controller configured to operate the plurality of switches in a series of converter operating cycles;
wherein each converter operating cycle includes a first and a second power transfer interval, the first and second power transfer intervals having essentially equal durations, and wherein during the first power transfer interval a first set of the plurality of switches is ON and power is converted in the direction, and during the second power transfer interval a second set of the plurality of switches is ON and power is converted in the direction;
wherein the bus converter circuit is configured during the first power transfer interval (a) to form a first series circuit in which at least the following elements are all connected in series without regard to order: at least one of the first or second terminals, at least one of the first or second windings of the transformer, at least one of the plurality of switches in the first set, and at least one capacitor, and (b) to conduct current in the direction between the first terminal and the second terminal;
wherein the bus converter circuit is configured during the second power transfer interval (a) to form a second series circuit in which at least the following elements are all connected in series without regard to order: at least one of the first or second terminals, at least one of the first or second windings of the transformer, at least one of the plurality of switches in the second set, and at least one capacitor, and (b) to conduct current in the direction between the first terminal and the second terminal;
wherein the bus converter circuit is configured to, before the first power transfer interval, reduce a voltage across a first ZVS switch prior to turning the first ZVS switch ON, such that the voltage across the first ZVS switch is reduced when the first ZVS switch is turned ON, the first ZVS switch being at least one of the plurality of switches in the first set; and
wherein the bus converter circuit is configured to, before the second power transfer interval, reduce a voltage across a second ZVS switch prior to turning the second ZVS switch ON, such that the voltage across the second ZVS switch is reduced when the second ZVS switch is turned ON, the second ZVS switch being at least one of the plurality of switches in the second set.