US 12,394,753 B2
Semiconductor package
Hyeonseok Lee, Pyeongtaek-si (KR); Jongyoun Kim, Seoul (KR); and Seokhyun Lee, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jul. 3, 2024, as Appl. No. 18/763,686.
Application 18/763,686 is a continuation of application No. 17/723,981, filed on Apr. 19, 2022, granted, now 12,057,435.
Claims priority of application No. 10-2021-0115589 (KR), filed on Aug. 31, 2021.
Prior Publication US 2024/0355779 A1, Oct. 24, 2024
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 25/0655 (2013.01) [H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 2224/13008 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/13019 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13166 (2013.01); H01L 2224/13184 (2013.01); H01L 2224/13541 (2013.01); H01L 2224/13553 (2013.01); H01L 2224/1357 (2013.01); H01L 2224/16014 (2013.01); H01L 2224/16055 (2013.01); H01L 2224/16058 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/1703 (2013.01); H01L 2224/17055 (2013.01); H01L 2924/182 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of fabricating a semiconductor package, comprising:
forming a device layer on a semiconductor substrate;
forming a wiring layer on the device layer, the wiring layer including a conductive pad; and
forming a redistribution layer on the wiring layer,
wherein the forming the redistribution layer comprises:
forming a first redistribution dielectric layer on the wiring layer, the first redistribution dielectric layer exposing the conductive pad; and
performing a deposition process of a redistribution pattern on the first redistribution dielectric layer, the redistribution pattern including a contact part directly on the conductive pad and a pad part,
the method further comprising:
forming a dielectric film on the redistribution layer, the dielectric film covering the contact part and exposing the pad part;
forming a conductive bump pattern directly on the pad part; and
forming a solder pattern directly on the conductive bump pattern.