US 12,394,740 B2
Solder based hybrid bonding for fine pitch and thin BLT interconnection
Wei Zhou, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Nov. 6, 2023, as Appl. No. 18/502,389.
Application 18/502,389 is a continuation of application No. 17/684,292, filed on Mar. 1, 2022, granted, now 11,810,882.
Prior Publication US 2024/0071973 A1, Feb. 29, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/16 (2013.01) [H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/14 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/91 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05169 (2013.01); H01L 2224/05173 (2013.01); H01L 2224/05176 (2013.01); H01L 2224/05178 (2013.01); H01L 2224/0518 (2013.01); H01L 2224/05181 (2013.01); H01L 2224/05183 (2013.01); H01L 2224/05184 (2013.01); H01L 2224/05541 (2013.01); H01L 2224/11826 (2013.01); H01L 2224/11827 (2013.01); H01L 2224/11845 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/13009 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/13166 (2013.01); H01L 2224/13169 (2013.01); H01L 2224/13173 (2013.01); H01L 2224/13176 (2013.01); H01L 2224/13178 (2013.01); H01L 2224/1318 (2013.01); H01L 2224/13181 (2013.01); H01L 2224/13183 (2013.01); H01L 2224/13184 (2013.01); H01L 2224/13565 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/29191 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73103 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/8185 (2013.01); H01L 2924/0635 (2013.01); H01L 2924/0665 (2013.01); H01L 2924/07025 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate having a frontside surface and a backside surface;
a polymer layer disposed on the frontside surface of the substrate;
a plurality of solder bumps disposed on the frontside surface of the substrate, the plurality of solder bumps protruding out of the polymer layer, wherein each of the plurality of solder bumps has a first end and a second end, the first end of each of the plurality of solder bumps is disposed away from the substrate, and the second end of each of the plurality of solder bumps is connected to the substrate, wherein the plurality of solder bumps have a pitch less than 10 μm; and
a plurality of solder balls each disposed above the first end of corresponding one of the plurality of solder bumps.