US 12,394,687 B2
Semiconductor package including a heat dissipation structure
Yunhyeok Im, Hwaseong-si (KR); and Youngsang Cho, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Nov. 2, 2022, as Appl. No. 18/052,187.
Claims priority of application No. 10-2021-0165882 (KR), filed on Nov. 26, 2021.
Prior Publication US 2023/0290701 A1, Sep. 14, 2023
Int. Cl. H01L 23/02 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/373 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/367 (2013.01) [H01L 23/3128 (2013.01); H01L 23/3736 (2013.01); H01L 23/49811 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a first substrate;
a semiconductor chip disposed on the first substrate;
a mold layer disposed on the first substrate and covering the semiconductor chip; and
a heat dissipation structure disposed on a first top surface of the semiconductor chip and also disposed in the mold layer, the heat dissipation structure at least partially covering an inner side surface of the mold layer,
wherein a surface roughness of the first top surface of the semiconductor chip is greater than a surface roughness of a side surface of the semiconductor chip,
wherein a surface roughness of the inner side surface of the mold layer is greater than a surface roughness of a top surface of the mold layer, and
wherein the heat dissipation structure includes voids disposed therein.