US 12,394,671 B2
Efficient removal of street test devices during wafer dicing
Michael Todd Wyant, Dallas, TX (US); Joseph Liu, Dallas, TX (US); and Christopher Daniel Manack, Flower Mound, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Feb. 28, 2022, as Appl. No. 17/682,617.
Prior Publication US 2023/0274978 A1, Aug. 31, 2023
Int. Cl. H01L 21/66 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01); H01L 23/544 (2006.01); H01L 23/10 (2006.01)
CPC H01L 21/78 (2013.01) [H01L 22/12 (2013.01); H01L 23/31 (2013.01); H01L 23/544 (2013.01); H01L 22/34 (2013.01); H01L 23/10 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor package, comprising:
coupling a photoresist layer to a non-device side of a semiconductor wafer, the semiconductor wafer having a device side, first and second circuits formed in the device side and separated by a scribe street, a test device positioned in the scribe street;
coupling a tape to the device side of the semiconductor wafer;
performing a photolithographic process to form an opening in the photoresist layer;
plasma etching through the semiconductor wafer by way of the opening in the photoresist layer to produce first and second semiconductor dies having the first and second circuits, respectively;
removing the tape from device sides of the first and second semiconductor dies, wherein removing the tape includes removing the test device;
coupling the first circuit of the first semiconductor die to a conductive member; and
covering the first semiconductor die with a mold compound, the conductive member exposed to an exterior surface of the mold compound, wherein a width of the opening is same as a width of the test device.