US 12,394,496 B2
Apparatus and method for reducing signal interference in a semiconductor device
Soo Yeol Chai, Gyeonggi-do (KR); and Jin Haeng Lee, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Apr. 27, 2022, as Appl. No. 17/730,917.
Claims priority of application No. 10-2021-0162035 (KR), filed on Nov. 23, 2021.
Prior Publication US 2023/0162806 A1, May 25, 2023
Int. Cl. G11C 16/24 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3427 (2013.01) [G11C 16/24 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory structure including plural page buffers coupled to non-volatile memory cells, each non-volatile memory cell capable of storing data, wherein the plural page buffers are disposed in a predetermined direction; and
a control circuit configured to separate reset sections of two page buffers from each other by a length of time, the length corresponding to at least one of the reset sections,
wherein the two page buffers are disposed directly adjacent to each other among the plural page buffers.