| CPC G11C 16/28 (2013.01) | 16 Claims |
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1. A method for reading data from a non-volatile memory array comprising a plurality of memory cells, a respective memory cell being configured to store one logic state of digital information, the method comprising the steps of:
powering on the memory array, where information stored in at least a respective first memory cell and a respective second memory cell together corresponds to one logic state of sensible data;
reading at least a respective first memory cell value from the respective first memory cell and a respective second memory cell value from the respective second memory cell by comparing a reference value to a respective electrical property value of the respective memory cell to determine the respective memory cell value, the respective electrical property value being associated with a logic state value stored in the respective memory cell;
adjusting the reference value in an event that at least the respective first and second memory cell values have a first combination of logic state values to obtain an adjusted reference value, wherein the adjusted reference value lies in a space between a first distribution of possible electrical property values for the respective first memory cell value, and a second distribution of possible electrical property values for the respective second memory cell value;
reading at least the respective first memory cell value from the respective first memory cell and the respective second memory cell value from the respective second memory cell by using the adjusted reference value to obtain a second combination of logic state values different from the first combination of logic state values; and
determining a logic state value of sensible data read from the memory array based on the obtained second combination of logic state values.
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