US 12,394,460 B2
Nonvolatile memory device and memory system including the same
Cheolhui Lee, Suwon-si (KR); Youngmin Jo, Suwon-si (KR); Anil Kavala, Suwon-si (KR); Jungjune Park, Suwon-si (KR); and Chiweon Yoon, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 31, 2023, as Appl. No. 18/498,267.
Claims priority of application No. 10-2023-0019534 (KR), filed on Feb. 14, 2023.
Prior Publication US 2024/0274173 A1, Aug. 15, 2024
Int. Cl. G11C 7/14 (2006.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01)
CPC G11C 7/222 (2013.01) [G11C 7/1081 (2013.01); G11C 7/14 (2013.01); G11C 7/225 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A nonvolatile memory comprising:
a receive buffer configured to generate a buffer signal by comparing an input signal with a reference voltage;
a reference voltage calibrator configured to generate a calibrated reference voltage code signal based on a reference voltage code signal and the buffer signal; and
a reference voltage generator configured to generate the reference voltage based on the calibrated reference voltage code signal,
the reference voltage calibrator comprising
a duty cycle monitor configured to generate a monitoring signal by measuring a duty cycle of the buffer signal;
an up/down counter configured to generate a count number signal by comparing a reference duty cycle with a measurement duty cycle corresponding to the monitoring signal; and
a code calculator configured to generate the calibrated reference voltage code signal based on the count number signal and the reference voltage code signal.