US 12,394,455 B2
Memory system and non-volatile memory using soft bit data information to improve memory operation
Keisuke Azuma, Tokyo (JP); Mitsuaki Honma, Fujisawa (JP); and Daisuke Arizono, Yokohama (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Sep. 14, 2022, as Appl. No. 17/931,945.
Claims priority of application No. 2021-191709 (JP), filed on Nov. 26, 2021.
Prior Publication US 2023/0170004 A1, Jun. 1, 2023
Int. Cl. G11C 7/06 (2006.01); G06F 12/02 (2006.01); G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 29/52 (2006.01)
CPC G11C 7/1069 (2013.01) [G06F 12/0246 (2013.01); G11C 7/06 (2013.01); G11C 7/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a non-volatile memory including a plurality of memory cells each capable of storing at least a first bit and a second bit, and configured to calculate third soft bit data via lossless compression by performing a logical sum calculation using at least first soft bit data corresponding to the first bit and second soft bit data corresponding to the second bit; and
a memory controller configured to fully restore the first soft bit data and the second soft bit data based on at least first hard bit data corresponding to the first bit, second hard bit data corresponding to the second bit, and the third soft bit data.