| CPC G09G 3/3266 (2013.01) [G09G 3/32 (2013.01); G09G 3/3291 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01)] | 20 Claims |
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1. A scan driver comprising:
stages which sequentially output scan signals to scan signal lines during an active period of an N-th frame, wherein N is a positive integer, wherein
at least one of the stages comprises:
an output node controller that supplies a gate-on voltage to a pull-up node in response to a gate control signal of a display driver; and
an output controller that supplies a scan signal to a scan signal line by outputting a scan clock signal, which is input through a scan clock terminal, to the scan signal line in case that the gate-on voltage is supplied to the pull-up node, and
the output node controller comprises:
at least one thin-film transistor which includes a first active layer including a first oxide semiconductor material, and is directly or indirectly connected to the pull-up node; and
at least another one thin-film transistor which includes a second active layer including a second oxide semiconductor material different from the first oxide semiconductor material of the first active layer, and is directly connected to the pull-up node.
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