US 12,394,364 B2
Gate driving circuit and display device including the same
Yeon Woo Shin, Paju-si (KR); and Jae Sung Yu, Paju-si (KR)
Assigned to LG Display Co., Ltd., Seoul (KR)
Filed by LG Display Co., Ltd., Seoul (KR)
Filed on Nov. 21, 2023, as Appl. No. 18/516,836.
Claims priority of application No. 10-2022-0189823 (KR), filed on Dec. 29, 2022.
Prior Publication US 2024/0221624 A1, Jul. 4, 2024
Int. Cl. G09G 3/32 (2016.01)
CPC G09G 3/32 (2013.01) [G09G 2300/0426 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A display device comprising:
a display panel configured to display an image;
a data driver configured to supply a data voltage to the display panel;
a gate driver including a scan signal generation circuit configured to supply a scan signal to the display panel and a light-emitting signal generation circuit configured to supply a light-emitting signal to the display panel;
a start signal line configured to deliver a start signal to the gate driver;
a low-voltage line configured to supply a low-voltage power to the gate driver; and
a clear signal line coupled to the gate driver and configured to deliver a clear signal in an alternating current form including a positive voltage level and a negative voltage level,
wherein the negative voltage level of the clear signal is lower than a negative voltage level of the start signal and a negative voltage level of the low-voltage power, and
wherein the clear signal is configured to initialize the gate driver before the start signal is applied by discharging at least one node of nodes of the scan signal generation circuit and at least one node of nodes of the light-emitting signal generation circuit,
wherein the clear signal line includes a first clear signal line transmitting a first clear signal and a second clear signal line transmitting a second clear signal,
the first clear signal line connected to a back gate electrode of a first signal transistor included in the scan signal generation circuit and the second clear signal line connected to a back gate electrode of a second signal transistor included in the light-emitting signal generation circuit, and
wherein a negative voltage level of the first clear signal and a negative voltage level of the second clear signal are changed to have different levels in at least one frame while maintaining the negative voltage.