| CPC G09G 3/20 (2013.01) [G09G 3/32 (2013.01); G09G 3/3266 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01)] | 20 Claims |

|
1. A shift register comprising a plurality of stages,
wherein at least one of the stages is configured to receive an input signal, a first clock signal, a second clock signal, a first power voltage and a second power voltage and to output an output signal, and
wherein the at least one of the stages comprises:
a pull up switching element connected between a first power voltage terminal configured to receive the first power voltage and an output terminal configured to output the output signal;
a pull down switching element connected between a second power voltage terminal configured to receive the second power voltage and the output terminal;
a first pull down control switching element connected to a control electrode of the pull down switching element; and
a second pull down control switching element connected to the first power voltage terminal and the control electrode of the pull down switching element,
wherein a first electrode of the first pull down control switching element is connected to the control electrode of the pull down switching element, and a second electrode and a control electrode of the first pull down control switching element are connected to each other.
|