US 12,393,544 B2
Dynamic die-to-die serial lane configuration
Kunal Desai, Bangalore (IN); and Deepak Kumar Agarwal, Bangalore (IN)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM INCORPORATED, San Diego, CA (US)
Filed on Apr. 18, 2023, as Appl. No. 18/302,535.
Prior Publication US 2024/0354275 A1, Oct. 24, 2024
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4282 (2013.01) [G06F 11/0745 (2013.01); G06F 11/076 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A method for dynamically configuring a die-to-die serial data link, comprising:
transmitting, by a first die, a test data pattern over a plurality of first-die-to-second-die lanes of the die-to-die serial data link in response to a test mode, the link comprising the plurality of first-die-to-second-die lanes and a plurality of second-die-to-first-die lanes;
receiving, by a second die, a received data pattern on the first-die-to-second-die lanes in response to the test mode;
determining, by the second die, a number of mismatched bits between the received data pattern and a predetermined data pattern;
configuring, by the second die, a second-die receive path to use all of the plurality of first-die-to-second-die lanes when there are no more than a threshold number of mismatched bits;
determining, by the second die, a sub-group of the first-die-to-second-die lanes not associated with mismatched bits when there are more than the threshold number of mismatched bits; and
configuring, by the second die, the second-die receive path to use the sub-group of first-die-to-second-die lanes when there are more than the threshold number of mismatched bits.