US 12,393,503 B2
Processor performance profiling using trace actions
Beeman Connally Strong, Portland, OR (US)
Assigned to Rivos Inc., Santa Clara, CA (US)
Filed by Rivos Inc., Mountain View, CA (US)
Filed on Dec. 13, 2022, as Appl. No. 18/065,543.
Prior Publication US 2024/0193070 A1, Jun. 13, 2024
Int. Cl. G06F 9/44 (2018.01); G06F 9/30 (2018.01); G06F 11/34 (2006.01)
CPC G06F 11/3495 (2013.01) [G06F 9/30101 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor comprising:
an instruction processing unit configured to execute a software program including a plurality of machine-readable instructions;
a hardware performance monitoring unit, the hardware performance monitoring unit including:
a plurality of counters configured to count respective processing events associated with execution of the software program, and
a counter overflow monitor configured to generate an indication of a respective counter-overflow trace action in response to overflow of a counter of the plurality of counters; and
a trace encoder configured to:
receive the indication of the respective counter-overflow trace action from the hardware performance monitoring unit, and
in response to the indication of the respective counter-overflow trace action, perform the respective counter-overflow trace action.