US 12,393,477 B2
Control device and method for operating control device
Michitomo Yamaguchi, Kawasaki Kanagawa (JP); Satoshi Kamiya, Kawasaki Kanagawa (JP); and Hiroshi Ichikawa, Kawasaki Kanagawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed on Sep. 1, 2023, as Appl. No. 18/241,492.
Claims priority of application No. 2023-061896 (JP), filed on Apr. 6, 2023.
Prior Publication US 2024/0338285 A1, Oct. 10, 2024
Int. Cl. G06F 11/07 (2006.01); H04L 1/00 (2006.01); G05B 23/02 (2006.01)
CPC G06F 11/0736 (2013.01) [G06F 11/0772 (2013.01); G06F 11/0775 (2013.01); G06F 11/0796 (2013.01); H04L 1/0079 (2013.01); G05B 23/0264 (2013.01); G05B 23/027 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A control device comprising:
a first region including a CPU and a sequence signal generation circuit; and
a second region including an abnormality detection circuit, a sequence signal detection circuit, a first register storing multiple methods of recovery from occurrence of abnormality, and a second register for use to select one method of recovery from the multiple methods of recovery, the second region being higher in reliability than the first region,
wherein the sequence signal generation circuit converts a first signal that specifies the one method of recovery into a sequence signal containing a second signal, the second signal being a digital signal of a predetermined pattern, and
the sequence signal detection circuit changes a set value of the second register upon receiving the second signal.