| CPC G06F 3/0656 (2013.01) [G06F 3/0608 (2013.01); G06F 3/0679 (2013.01); G11C 16/26 (2013.01)] | 20 Claims |

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1. A method of controlling a memory, comprising:
performing a read operation based on a read voltage corresponding to a target logical page to obtain a hard read value and a soft read value of the target logical page;
storing the hard read value, the soft read value, and inhibition information into three latches in a page buffer respectively;
obtaining hard data of the target logical page based on the hard read value of the target logical page; and
obtaining soft data of the target logical page based on the hard data and the soft read value of the target logical page,
wherein the memory comprises a plurality of memory cells,
wherein each of the memory cells is configured to store N-bit data, and
wherein N is an integer greater than 1.
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