US 12,393,067 B2
Driver circuit for suppressing variations in slew rate
Hijiri Shirasaki, Yokohama (JP)
Assigned to LAPIS Technology Co., Ltd., Yokohama (JP)
Filed by LAPIS Technology Co., Ltd., Yokohama (JP)
Filed on Mar. 1, 2024, as Appl. No. 18/592,525.
Claims priority of application No. 2023-033214 (JP), filed on Mar. 3, 2023.
Prior Publication US 2024/0295764 A1, Sep. 5, 2024
Int. Cl. G09G 3/36 (2006.01); G02F 1/133 (2006.01); H03K 17/687 (2006.01)
CPC G02F 1/13306 (2013.01) [G09G 3/3648 (2013.01); H03K 17/687 (2013.01); G09G 2310/0291 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/041 (2013.01)] 3 Claims
OG exemplary drawing
 
1. A driver circuit comprising:
an output amplifier that outputs an output signal for driving a liquid crystal display panel;
a bias setting circuit that sets a bias level of the output amplifier;
an automatic setting circuit that outputs a trimming code; and
an adjustment circuit that changes a resistance value based on the trimming code inputted from the automatic setting circuit to change the bias level of the bias setting circuit and adjust a slew rate of the output amplifier,
in an adjustment mode, the automatic setting circuit sequentially changes the trimming code outputted to the adjustment circuit and stores a trimming code with which a voltage value of the output signal after a preset time has elapsed from input of an input signal to the output amplifier becomes a target voltage set in advance, and, in a normal operation mode, outputs the stored trimming code to the adjustment circuit, wherein the automatic setting circuit comprises a comparator that compares, with a voltage value of the target voltage set in advance, the voltage value of the output signal after the preset time has elapsed from input of the input signal to the output amplifier, and the automatic setting circuit stores a trimming code of a time when output of the comparator becomes a logic indicating that the two voltage values match.