US 12,392,895 B2
Control circuit and distance measurement system to improve sensitivity characteristics of SPAD element
Hayato Kamizuru, Kumamoto (JP); and Daisuke Hirono, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/310,815
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Dec. 17, 2019, PCT No. PCT/JP2019/049482
§ 371(c)(1), (2) Date Aug. 25, 2021,
PCT Pub. No. WO2020/183843, PCT Pub. Date Sep. 17, 2020.
Claims priority of application No. 2019-044809 (JP), filed on Mar. 12, 2019.
Prior Publication US 2022/0120898 A1, Apr. 21, 2022
Int. Cl. G01S 17/10 (2020.01); G01S 7/481 (2006.01); G01S 7/4861 (2020.01); G01S 7/4865 (2020.01)
CPC G01S 17/10 (2013.01) [G01S 7/4814 (2013.01); G01S 7/4816 (2013.01); G01S 7/4861 (2013.01); G01S 7/4865 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A control circuit comprising:
first wiring to which a first power supply voltage is applied;
second wiring to which a second power supply voltage lower than the first power supply voltage is applied;
a current supply unit configured to supply a predetermined current from the first wiring to a single photon avalanche diode (SPAD) element;
a first withstand voltage unit configured to hold a lower voltage side of the current supply unit at a voltage equal to or above the second power supply voltage;
an inverter connected to a cathode of the SPAD element; and
a second withstand voltage unit configured to hold the inverter at a voltage equal to or below the second power supply voltage, wherein
the second withstand voltage unit includes:
an N-type first transistor that is provided between the cathode of the SPAD element and an input terminal of the inverter, and has a gate connected to the second wiring; and
a P-type second transistor that is provided between the second wiring and a source of the N-type first transistor, and has a gate connected to an output terminal of the inverter.