US 12,392,823 B2
Systems and methods for on-chip noise measurements
Jed D. Whittaker, Vancouver (CA); Richard Harris, North Vancouver (CA); and Rahul Deshpande, Vancouver (CA)
Assigned to D-WAVE SYSTEMS INC., Burnaby (CA)
Filed by D-WAVE SYSTEMS INC., Burnaby (CA)
Filed on Oct. 21, 2022, as Appl. No. 17/970,853.
Claims priority of provisional application 63/276,113, filed on Nov. 5, 2021.
Prior Publication US 2023/0400510 A1, Dec. 14, 2023
Int. Cl. G01R 31/317 (2006.01)
CPC G01R 31/31702 (2013.01) [G01R 31/31709 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method of conducting spatial noise measurements in a superconducting fabrication stack, the superconducting fabrication stack comprising one or more material interfaces, the method comprising:
identifying one or more spatial regions of the superconducting fabrication stack;
generating a plurality of resonator geometries;
fabricating a plurality of resonators on the superconducting fabrication stack, each resonator of the plurality of resonators having a respective one of the plurality of resonator geometries;
measuring data from the plurality of resonators;
calculating fill fractions for the one or more spatial regions of the superconducting fabrication stack based on electromagnetic (EM) field modeling and respective dimensions of each resonator geometry; and
determining a spin density for each spatial region of the one or more spatial regions of the superconducting fabrication stack based on the data measured from the plurality of resonators and the calculated fill fractions.