US 12,392,811 B2
Panel impedance sensing via driver replica current
Tom W. Kwan, Cupertino, CA (US); Yue Hu, San Jose, CA (US); Feng Su, San Jose, CA (US); Guowen Wei, San Jose, CA (US); Fang Lin, San Jose, CA (US); and Iuri Mehr, Irvine, CA (US)
Assigned to Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed by Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed on Mar. 15, 2023, as Appl. No. 18/122,061.
Prior Publication US 2024/0310419 A1, Sep. 19, 2024
Int. Cl. G01R 27/02 (2006.01); G01R 19/00 (2006.01); G06F 3/041 (2006.01); G06F 3/044 (2006.01)
CPC G01R 27/02 (2013.01) [G01R 19/0046 (2013.01); G06F 3/0416 (2013.01); G06F 3/044 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a driver circuit configured to provide a voltage at a node of a load, the voltage based on a first current;
a first circuit configured to generate a second current proportional to the first current; and
a second circuit configured to measure the first current by:
measuring the second current; and
determining a capacitance of the load using values of the voltage and the second current; and
a current measurement circuit configured to provide a measurable voltage proportional to the second current, determine a resistance-capacitance (RC) model parameter associated with the load via measurements at different frequencies used to determine the capacitance.