US 12,389,625 B2
Semiconductor device with gate
Jung-Chi Jeng, Tainan (TW); I-Chih Chen, Tainan (TW); Wen-Chang Kuo, Tainan (TW); Ying-Hao Chen, Tainan (TW); Ru-Shang Hsiao, Jhubei (TW); and Chih-Mu Huang, Tainan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Mar. 2, 2023, as Appl. No. 18/177,479.
Application 18/177,479 is a division of application No. 16/892,458, filed on Jun. 4, 2020, granted, now 11,600,727.
Application 16/892,458 is a division of application No. 15/670,978, filed on Aug. 7, 2017, granted, now 10,680,103, issued on Jun. 9, 2020.
Application 15/670,978 is a division of application No. 14/080,313, filed on Nov. 14, 2013, granted, now 9,728,637, issued on Aug. 8, 2017.
Prior Publication US 2023/0207693 A1, Jun. 29, 2023
Int. Cl. H10D 30/60 (2025.01); H10D 30/01 (2025.01); H10D 62/10 (2025.01)
CPC H10D 30/601 (2025.01) [H10D 30/0227 (2025.01); H10D 62/115 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate;
an isolation structure in the semiconductor substrate, wherein the isolation structure surrounds an active region of the semiconductor substrate;
a gate over the semiconductor substrate, wherein the gate is across the active region and extends onto the isolation structure, and the gate has a first sidewall across the active region and extending onto the isolation structure;
a spacer layer covering a middle portion of the first sidewall and across a boundary between the active region and the isolation structure; and
a support film over the isolation structure, wherein the support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a first top surface and a second portion of a second sidewall of the gate and a second top surface of the isolation structure, the first top surface and the second top surface face away from the semiconductor substrate, the entire support film and an entire topmost surface of the active region do not overlap with each other, the topmost surface of the active region faces the gate,
the support film has a third top surface, a first inner wall, and a second inner wall, the first inner wall and the second inner wall face each other and are connected to the third top surface, the entire topmost surface of the active region and the entire spacer layer are between the first inner wall and the second inner wall in a top view of the active region, the spacer layer, and the support film, a first distance between the first inner wall and the second inner wall is substantially equal to a first length of the spacer layer, the first length is measured in a direction from the first inner wall toward the second inner wall,
the gate has a corner between the first top surface and the second sidewall, the support film has a corner part wrapped around the corner, the corner part is connected to the first part, and the corner part has a convex curved surface facing away from the corner.