| CPC H10D 30/475 (2025.01) [H10D 30/015 (2025.01); H10D 62/115 (2025.01); H10D 64/021 (2025.01)] | 8 Claims |

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1. A high electron mobility transistor, comprising:
an epitaxial stack on a substrate;
a gate structure on the epitaxial stack, wherein the gate structure comprises a semiconductor gate layer and a metal gate layer on the semiconductor gate layer;
a passivation layer on the epitaxial stack and the gate structure; and
an air gap between the passivation layer and the gate structure and comprising:
a first portion in direct contact with a sidewall of the passivation layer, a sidewall of the metal gate layer and a top surface of the semiconductor gate layer;
a second portion in direct contact with a sidewall of the semiconductor gate layer and a top surface of the epitaxial stack; and
a third portion between a bottom surface of the passivation layer and the top surface of the epitaxial stack, wherein the second portion and the third portion form an L shape.
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