US 12,389,617 B2
Semiconductor device and method of fabricating the same
Yu-Cheng Tung, Quanzhou (CN); and Janbo Zhang, Quanzhou (CN)
Assigned to Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed by Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed on Mar. 29, 2022, as Appl. No. 17/706,630.
Claims priority of application No. 202111404609.1 (CN), filed on Nov. 24, 2021; and application No. 202122906026.0 (CN), filed on Nov. 24, 2021.
Prior Publication US 2023/0163201 A1, May 25, 2023
Int. Cl. H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01)
CPC H10D 30/024 (2025.01) [H10D 30/6211 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising;
a substrate;
a plurality of active areas, separately with each other in the substrate, each of the active areas comprising an active fin and active ends disposed at two sides of the active fin, and the active fin and the active ends comprising different materials;
an isolation structure, disposed in the substrate to surround the active areas;
a plurality of first wires, disposed in the substrate to intersect with the active areas, across the isolation structure, wherein each of the first wires comprises:
a gate electrode layer; and
a capping layer disposed on the gate electrode layer; and
a plurality of plugs disposed on the substrate, wherein at least one of the plugs directly contacts the active fin and one of the two active ends of one of the active areas, and the capping layer of one of the first wires.