| CPC H10D 1/696 (2025.01) [H01G 4/018 (2013.01); H01L 23/5223 (2013.01)] | 20 Claims |
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1. A semiconductor structure, comprising:
a substrate;
a first capacitor structure disposed above the substrate and comprising:
a first electrode layer;
a second electrode layer disposed on the first electrode layer, wherein a top-view pattern of the second electrode layer partially overlaps a top-view pattern of the first electrode layer to have a first overlapping region;
a third electrode layer disposed on the second electrode layer, wherein a top-view pattern of the third electrode layer partially overlaps the top-view pattern of the second electrode layer to have a second overlapping region, wherein the first overlapping region and the second overlapping region have the same top-view area;
a first dielectric layer disposed between the first electrode layer and the second electrode layer; and
a second dielectric layer disposed between the second electrode layer and the third electrode layer;
a first contact structure electrically connected to the first electrode layer and the third electrode layer, wherein a top-view pattern of the first contact structure is located outside the first overlapping region and outside the second overlapping region; and
a second contact structure electrically connected to the second electrode layer, wherein a top-view pattern of the second contact structure is located outside the first overlapping region and outside the second overlapping region.
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