| CPC H10D 1/684 (2025.01) [H01L 23/5223 (2013.01)] | 20 Claims |

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1. A method, comprising:
depositing a first passivation layer over a substrate including one or more semiconductor devices;
forming a metal-insulator-metal (MIM) capacitor over the first passivation layer; and
forming a second passivation layer over the MIM capacitor, wherein the forming the second passivation layer includes:
depositing a first dielectric portion of the second passivation layer over the MIM capacitor;
forming a stress-reduction feature of the second passivation layer over the first dielectric portion, wherein the forming the stress-reduction feature includes depositing a first nitrogen-containing layer over the first dielectric portion, depositing an oxygen-containing layer over the first nitrogen-containing layer and depositing a second nitrogen-containing layer over the oxygen-containing layer; and
depositing a second dielectric portion of the second passivation layer over the stress-reduction feature;
wherein the first nitrogen-containing layer has a first thickness, wherein the oxygen-containing layer has a second thickness, wherein the second nitrogen- containing layer has a third thickness, and wherein the second thickness is less than each of the first thickness and the third thickness.
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