US 12,388,032 B2
Semiconductor device with redistribution layers formed utilizing dummy substrates
Jin Young Kim, Seoul (KR); Ji Young Chung, Gyeonggi-do (KR); Doo Hyun Park, Gyeonggi-do (KR); and Choon Heung Lee, Seoul (KR)
Assigned to AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD., Singapore (SG)
Filed by Amkor Technology Singapore Holding Pte. Ltd., Singapore (SG)
Filed on Mar. 6, 2023, as Appl. No. 18/117,539.
Application 18/117,539 is a continuation of application No. 16/921,522, filed on Jul. 6, 2020, granted, now 11,600,582.
Application 16/921,522 is a continuation of application No. 14/449,654, filed on Aug. 1, 2014, granted, now 10,707,181, issued on Jul. 7, 2020.
Claims priority of application No. 10-2014-0013332 (KR), filed on Feb. 5, 2014.
Prior Publication US 2023/0207502 A1, Jun. 29, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 25/10 (2006.01); H01L 21/48 (2006.01)
CPC H01L 24/02 (2013.01) [H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/3142 (2013.01); H01L 23/5385 (2013.01); H01L 23/5389 (2013.01); H01L 25/105 (2013.01); H01L 21/4857 (2013.01); H01L 23/3128 (2013.01); H01L 23/5387 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/023 (2013.01); H01L 2224/02319 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/1316 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81001 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/92125 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
an upper redistribution structure comprising an upper redistribution structure top side, an upper redistribution structure bottom side, and upper redistribution structure lateral sides between the upper redistribution structure top side and the upper redistribution structure bottom side;
a lower redistribution structure comprising a lower redistribution structure top side;
a conductive interconnect structure coupling the upper redistribution structure to the lower redistribution structure;
an encapsulant material between the lower redistribution structure top side and the upper redistribution structure bottom side; and
a semiconductor die comprising a die top side, a die bottom side, and die lateral sides between the die top side and the die bottom side, wherein the die bottom side is coupled to the lower redistribution structure top side and the die top side is coupled to the upper redistribution structure bottom side;
wherein the encapsulant material contacts and encapsulates at least the die lateral sides;
wherein the encapsulant material laterally surrounds the upper redistribution structure lateral sides; and
wherein none of the encapsulant material exists between the die top side and the upper redistribution structure bottom side.