US 12,387,802 B2
Non-volatile memory with lower current program-verify
Abu Naser Zainuddin, Milpitas, CA (US); Jiahui Yuan, Fremont, CA (US); and Toru Miwa, Yokohama (JP)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by Sandisk Technologies, Inc., Milpitas, CA (US)
Filed on Jul. 24, 2023, as Appl. No. 18/357,489.
Claims priority of provisional application 63/419,210, filed on Oct. 25, 2022.
Prior Publication US 2024/0136001 A1, Apr. 25, 2024
Prior Publication US 2024/0233841 A9, Jul. 11, 2024
Int. Cl. G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); H01L 25/065 (2023.01)
CPC G11C 16/3459 (2013.01) [G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-volatile storage apparatus, comprising:
a plurality of non-volatile memory cells;
a plurality of word lines connected to the memory cells;
a first select line connected to the memory cells; and
a control circuit connected to the memory cells and word lines as well as the first select line, the control circuit is configured to program the memory cells by applying doses of programming and perform program-verify between doses of programming;
the control circuit is configured to perform program-verify between doses of programming by:
ramping up voltage on the first select line for a next program-verify operation while performing a scan of the results of a previous program-verify operation and without waiting for the scan to complete; and
ramping up the voltages on unselected word lines for the next program-verify operation following a step signal while performing a scan of the results of a previous program-verify operation and without waiting for the scan to complete.