| CPC H10K 59/131 (2023.02) [H10K 71/00 (2023.02); H10K 59/1201 (2023.02); H10K 59/126 (2023.02)] | 26 Claims |

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1. A display device comprising:
a light-blocking layer disposed on a substrate;
a buffer layer disposed on the light-blocking layer;
a semiconductor layer disposed on the buffer layer;
a gate insulating layer disposed on the semiconductor layer;
a connection pattern layer and a gate electrode disposed on the gate insulating layer and spaced apart from each other;
an interlayer dielectric layer disposed on the connection pattern layer and the gate electrode;
a via layer disposed on the interlayer dielectric layer;
a first bridge layer and a second bridge layer disposed on the via layer;
a pixel electrode disposed on the second bridge layer;
a light-emitting layer disposed on the pixel electrode; and
a common electrode disposed on the light-emitting layer,
wherein:
a first end of the first bridge layer is connected to the light-blocking layer through the connection pattern layer, and a second end of the first bridge layer is connected to the semiconductor layer,
the second bridge layer connects the semiconductor layer with the pixel electrode, and
a portion of the pixel electrode is directly disposed on and directly contacts the via layer.
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